diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-23 20:38:23 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-30 00:45:36 +0000 |
| commit | 3cc2c38d50741fffb9193851a4a3b7c636f7cd4d (patch) | |
| tree | d836bf1ee32e6132d9db9aa1f19c5779e3398ccc /src/soc/intel/broadwell/pch.c | |
| parent | 9f6cdbaaf5d1a799e314e0baf9f4fda218abdf75 (diff) | |
soc/intel/broadwell: Separate PCH in devicetree
Flesh out the PCH configuration into a separate chip. Keep it within the
Broadwell SoC directory for now, to ease moving files around. The boards
were prepared beforehand and the devicetrees require next to no changes.
Tested on out-of-tree Acer Aspire E5-573, still boots.
Change-Id: I28d948f3e6d85e669d12b29516d867c1d1ae9e1a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46700
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/pch.c')
| -rw-r--r-- | src/soc/intel/broadwell/pch.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c index 2a27d92152..e0c5bb0c4d 100644 --- a/src/soc/intel/broadwell/pch.c +++ b/src/soc/intel/broadwell/pch.c @@ -166,10 +166,16 @@ void pch_disable_devfn(struct device *dev) } } -void broadwell_pch_enable_dev(struct device *dev) +static void broadwell_pch_enable_dev(struct device *dev) { u16 reg16; + if (dev->path.type != DEVICE_PATH_PCI) + return; + + if (dev->ops && dev->ops->enable) + return; + /* These devices need special enable/disable handling */ switch (PCI_SLOT(dev->path.pci.devfn)) { case PCH_DEV_SLOT_PCIE: @@ -195,4 +201,9 @@ void broadwell_pch_enable_dev(struct device *dev) } } +struct chip_operations soc_intel_broadwell_pch_ops = { + CHIP_NAME("Intel Broadwell PCH") + .enable_dev = &broadwell_pch_enable_dev, +}; + #endif |