summaryrefslogtreecommitdiff
path: root/src/soc/intel/broadwell/lpc.c
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-10-23 20:38:23 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-10-30 00:45:36 +0000
commit3cc2c38d50741fffb9193851a4a3b7c636f7cd4d (patch)
treed836bf1ee32e6132d9db9aa1f19c5779e3398ccc /src/soc/intel/broadwell/lpc.c
parent9f6cdbaaf5d1a799e314e0baf9f4fda218abdf75 (diff)
soc/intel/broadwell: Separate PCH in devicetree
Flesh out the PCH configuration into a separate chip. Keep it within the Broadwell SoC directory for now, to ease moving files around. The boards were prepared beforehand and the devicetrees require next to no changes. Tested on out-of-tree Acer Aspire E5-573, still boots. Change-Id: I28d948f3e6d85e669d12b29516d867c1d1ae9e1a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46700 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/lpc.c')
-rw-r--r--src/soc/intel/broadwell/lpc.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index 8b85a0420d..2111913a0e 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -24,7 +24,7 @@
#include <soc/pm.h>
#include <soc/ramstage.h>
#include <soc/rcba.h>
-#include <soc/intel/broadwell/chip.h>
+#include <soc/intel/broadwell/pch/chip.h>
#include <acpi/acpigen.h>
#include <southbridge/intel/common/rtc.h>
@@ -130,7 +130,7 @@ static void pch_power_options(struct device *dev)
u16 reg16;
const char *state;
/* Get the chip configuration */
- config_t *config = config_of(dev);
+ const struct soc_intel_broadwell_pch_config *config = config_of(dev);
int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
/* Which state do we want to goto after g3 (power restored)?
@@ -336,7 +336,7 @@ static void pch_enable_mphy(void)
static void pch_init_deep_sx(struct device *dev)
{
- config_t *config = config_of(dev);
+ const struct soc_intel_broadwell_pch_config *config = config_of(dev);
if (config->deep_sx_enable_ac) {
RCBA32_OR(DEEP_S3_POL, DEEP_S3_EN_AC);
@@ -567,7 +567,7 @@ static void pch_lpc_add_gen_io_resources(struct device *dev, int reg_value,
static void pch_lpc_add_io_resources(struct device *dev)
{
struct resource *res;
- config_t *config = config_of(dev);
+ const struct soc_intel_broadwell_pch_config *config = config_of(dev);
/* Add the default claimed IO range for the LPC device. */
res = new_resource(dev, 0);