diff options
author | Furquan Shaikh <furquan@google.com> | 2021-06-18 23:18:42 +0000 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2021-08-24 10:02:15 +0000 |
commit | 27c51a07236ab5133d1052251337e0465a33caf7 (patch) | |
tree | ef6ec6c5dcd565f15ea98b14a318eb2dab6d5406 /src/soc/intel/broadwell/include | |
parent | 93078ba1ae144304a19c83ae7d565cb2c39c1d15 (diff) |
Revert "soc/intel/broadwell/pch: Replace ACPI device NVS"
This reverts commit 68d8357dab55660058ad1ab8dca34fd03e0adbb5.
Reason for revert: Device NVS is expected by mainboard samus
in payload depthcharge:
https://chromium.googlesource.com/chromiumos/platform/depthcharge/+/932c6ba2704987c0db64dbdfe03c158482c7ab11/src/board/samus/board.c#60
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Icb5fa6da3412a51aae56c3658163e5b98d57bab3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54977
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/broadwell/include')
-rw-r--r-- | src/soc/intel/broadwell/include/soc/pch.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/broadwell/include/soc/pch.h b/src/soc/intel/broadwell/include/soc/pch.h index 8089f5bdb0..cf27499fe5 100644 --- a/src/soc/intel/broadwell/include/soc/pch.h +++ b/src/soc/intel/broadwell/include/soc/pch.h @@ -3,8 +3,6 @@ #ifndef _BROADWELL_PCH_H_ #define _BROADWELL_PCH_H_ -#include <acpi/acpi.h> - /* Haswell ULT Pch (LynxPoint-LP) */ #define PCH_LPT_LP_SAMPLE 0x9c41 #define PCH_LPT_LP_PREMIUM 0x9c43 @@ -32,8 +30,6 @@ int pch_is_wpt_ulx(void); u32 pch_read_soft_strap(int id); void pch_disable_devfn(struct device *dev); -void acpi_create_serialio_ssdt(acpi_header_t *ssdt); - void broadwell_pch_finalize(void); #endif |