diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-31 00:33:04 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-02-07 19:31:34 +0000 |
| commit | c715dc80f92f5cf1d29b53f2b2166e2a4f4b3dc4 (patch) | |
| tree | 08dc25d5ae137d824ae0db2f0be90956f521cbdc /src/soc/intel/broadwell/early_init.c | |
| parent | 84a37b9d55e8da6137bfeb9d2e866ae4273983a8 (diff) | |
soc/intel/broadwell: Use common {DMI,EP,MCH}BAR accessors
Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.
Change-Id: I04dbeade44d480301c9f7d336449bc54e56cb7bc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50169
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/early_init.c')
| -rw-r--r-- | src/soc/intel/broadwell/early_init.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/broadwell/early_init.c b/src/soc/intel/broadwell/early_init.c index 6bf7ba7a59..6c347f3380 100644 --- a/src/soc/intel/broadwell/early_init.c +++ b/src/soc/intel/broadwell/early_init.c @@ -11,9 +11,9 @@ static void broadwell_setup_bars(void) { /* Set up all hardcoded northbridge BARs */ - pci_write_config32(SA_DEV_ROOT, MCHBAR, MCH_BASE_ADDRESS | 1); - pci_write_config32(SA_DEV_ROOT, DMIBAR, DMI_BASE_ADDRESS | 1); - pci_write_config32(SA_DEV_ROOT, EPBAR, EP_BASE_ADDRESS | 1); + pci_write_config32(SA_DEV_ROOT, MCHBAR, CONFIG_FIXED_MCHBAR_MMIO_BASE | 1); + pci_write_config32(SA_DEV_ROOT, DMIBAR, CONFIG_FIXED_DMIBAR_MMIO_BASE | 1); + pci_write_config32(SA_DEV_ROOT, EPBAR, CONFIG_FIXED_EPBAR_MMIO_BASE | 1); MCHBAR32(EDRAMBAR) = EDRAM_BASE_ADDRESS | 1; MCHBAR32(GDXCBAR) = GDXC_BASE_ADDRESS | 1; |