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authorAngel Pons <th3fanbus@gmail.com>2020-07-25 15:11:15 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-28 08:52:42 +0000
commit4a6c0a368e96e393ef48606d6be30bbd9aee2d36 (patch)
tree78a5de1d840a6332cdce71ef2d4e1e6b99b40564 /src/soc/intel/broadwell/chip.h
parent9f78127b61632cbb138bdbfa650c2e9965440d3b (diff)
broadwell: Factor out PIRQ routing from devicetree
All boards disable PIRQs, except purism/librem_bdw. Since IRQ0 is invalid and modern OSes don't use PIRQ routing, disable the PIRQs. Change-Id: I93b074474c3c6d4329903cab928dc41e1d3a3fb3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43868 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/chip.h')
-rw-r--r--src/soc/intel/broadwell/chip.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h
index 45f91d8aef..554399823a 100644
--- a/src/soc/intel/broadwell/chip.h
+++ b/src/soc/intel/broadwell/chip.h
@@ -8,19 +8,6 @@
#include <stdint.h>
struct soc_intel_broadwell_config {
- /*
- * Interrupt Routing configuration
- * If bit7 is 1, the interrupt is disabled.
- */
- uint8_t pirqa_routing;
- uint8_t pirqb_routing;
- uint8_t pirqc_routing;
- uint8_t pirqd_routing;
- uint8_t pirqe_routing;
- uint8_t pirqf_routing;
- uint8_t pirqg_routing;
- uint8_t pirqh_routing;
-
/* GPE configuration */
uint32_t gpe0_en_1;
uint32_t gpe0_en_2;