From 4a6c0a368e96e393ef48606d6be30bbd9aee2d36 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 25 Jul 2020 15:11:15 +0200 Subject: broadwell: Factor out PIRQ routing from devicetree All boards disable PIRQs, except purism/librem_bdw. Since IRQ0 is invalid and modern OSes don't use PIRQ routing, disable the PIRQs. Change-Id: I93b074474c3c6d4329903cab928dc41e1d3a3fb3 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43868 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/broadwell/chip.h | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'src/soc/intel/broadwell/chip.h') diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h index 45f91d8aef..554399823a 100644 --- a/src/soc/intel/broadwell/chip.h +++ b/src/soc/intel/broadwell/chip.h @@ -8,19 +8,6 @@ #include struct soc_intel_broadwell_config { - /* - * Interrupt Routing configuration - * If bit7 is 1, the interrupt is disabled. - */ - uint8_t pirqa_routing; - uint8_t pirqb_routing; - uint8_t pirqc_routing; - uint8_t pirqd_routing; - uint8_t pirqe_routing; - uint8_t pirqf_routing; - uint8_t pirqg_routing; - uint8_t pirqh_routing; - /* GPE configuration */ uint32_t gpe0_en_1; uint32_t gpe0_en_2; -- cgit v1.2.3