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author | Alexander Couzens <lynxis@fe80.eu> | 2018-08-17 18:47:52 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2018-09-14 13:50:34 +0000 |
commit | 86b8d176e8b2d62c1d4a713f91b5858b5d39dd84 (patch) | |
tree | 1f8184f21b85c636a64e8c8825524c26189e61da /src/soc/intel/broadwell/acpi/sleepstates.asl | |
parent | df5e6f64b6dd465cb6253159dc3c7335e763dbde (diff) |
ec/lenovo/pmh7: support 9bit address space
The pmh7 has at least a 9bit address space.
The h8s allows to access the 9th address space by using io port
0x15ed as second address register.
The pmh7 is connected via SPI to the h8s. The h8s is acting as
proxy to access the address space.
Change-Id: I0d7ce00950862adf928a88d70afbc33df8b87d9a
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/28196
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Evgeny Zinoviev <me@ch1p.com>
Diffstat (limited to 'src/soc/intel/broadwell/acpi/sleepstates.asl')
0 files changed, 0 insertions, 0 deletions