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authorJason Glenesk <jason.glenesk@amd.corp-partner.google.com>2020-09-14 05:22:47 -0700
committerFurquan Shaikh <furquan@google.com>2020-09-25 22:49:56 +0000
commitbc5214342f70e7b2187a3e2e02a9d2bfc284a82c (patch)
tree6fe0f9dcf4a70436bc5ed622bddce67402d368a6 /src/soc/intel/broadwell/acpi/sata.asl
parentebd234e059ce13d28d25fcac133dfde94a069226 (diff)
soc/amd/picasso: Generate ACPI pstate and cstate objects in cb
Add code to generate p-state and c-state SSDT objects to coreboot. Publish objects generated in native coreboot, rather than the ones created by FSP binary. BUG=b:155307433 TEST=Boot morphius to shell and extract and compare objects created in coreboot with tables generated by FSP. Confirm they are equivalent. BRANCH=Zork Change-Id: I5f4db3c0c2048ea1d6c6ce55f5e252cb15598514 Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45340 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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