diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-13 22:16:25 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-18 15:25:35 +0000 |
commit | 8950cfb66f8f1fd4b047fbef2347134be0aeacec (patch) | |
tree | 57943bfb4f8d74c2d1a4bfbd2a9813ac27e510dd /src/soc/intel/braswell | |
parent | 4af4e7f06eddad71f86eda3e401967e79d3a9ddb (diff) |
soc/intel: Use config_of()
Change-Id: I0727a6b327410197cf32f598d1312737744386b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r-- | src/soc/intel/braswell/chip.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/emmc.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/lpe.c | 4 | ||||
-rw-r--r-- | src/soc/intel/braswell/lpss.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/pcie.c | 4 | ||||
-rw-r--r-- | src/soc/intel/braswell/romstage/romstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/sd.c | 5 | ||||
-rw-r--r-- | src/soc/intel/braswell/southcluster.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/xhci.c | 4 |
9 files changed, 12 insertions, 15 deletions
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c index 900b2f33fd..d179cead25 100644 --- a/src/soc/intel/braswell/chip.c +++ b/src/soc/intel/braswell/chip.c @@ -96,7 +96,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) return; } - config = dev->chip_info; + config = config_of(dev); /* Set the parameters for SiliconInit */ printk(BIOS_DEBUG, "Updating UPD values for SiliconInit\n"); diff --git a/src/soc/intel/braswell/emmc.c b/src/soc/intel/braswell/emmc.c index 09e801daaa..aae496a276 100644 --- a/src/soc/intel/braswell/emmc.c +++ b/src/soc/intel/braswell/emmc.c @@ -33,7 +33,7 @@ static const struct reg_script emmc_ops[] = { static void emmc_init(struct device *dev) { - struct soc_intel_braswell_config *config = dev->chip_info; + struct soc_intel_braswell_config *config = config_of(dev); printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c index a06d7a658f..58e3492771 100644 --- a/src/soc/intel/braswell/lpe.c +++ b/src/soc/intel/braswell/lpe.c @@ -96,7 +96,7 @@ static void setup_codec_clock(struct device *dev) struct soc_intel_braswell_config *config; const char *freq_str; - config = dev->chip_info; + config = config_of(dev); switch (config->lpe_codec_clk_src) { case LPE_CLK_SRC_XTAL: /* XTAL driven bit2=0 */ @@ -152,7 +152,7 @@ static void lpe_stash_firmware_info(struct device *dev) static void lpe_init(struct device *dev) { - struct soc_intel_braswell_config *config = dev->chip_info; + struct soc_intel_braswell_config *config = config_of(dev); printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); diff --git a/src/soc/intel/braswell/lpss.c b/src/soc/intel/braswell/lpss.c index d1ce76a5d6..245fc4ff3f 100644 --- a/src/soc/intel/braswell/lpss.c +++ b/src/soc/intel/braswell/lpss.c @@ -139,7 +139,7 @@ static void i2c_disable_resets(struct device *dev) static void lpss_init(struct device *dev) { - struct soc_intel_braswell_config *config = dev->chip_info; + struct soc_intel_braswell_config *config = config_of(dev); int iosf_reg, nvs_index; printk(BIOS_SPEW, "%s/%s (%s)\n", diff --git a/src/soc/intel/braswell/pcie.c b/src/soc/intel/braswell/pcie.c index 6e387d1d6b..dc779bbb80 100644 --- a/src/soc/intel/braswell/pcie.c +++ b/src/soc/intel/braswell/pcie.c @@ -141,13 +141,13 @@ static void pcie_enable(struct device *dev) printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); if (is_first_port(dev)) { - struct soc_intel_braswell_config *config = dev->chip_info; + struct soc_intel_braswell_config *config = config_of(dev); uint32_t reg = pci_read_config32(dev, PHYCTL2_IOSFBCTL); pll_en_off = !!(reg & PLL_OFF_EN); strpfusecfg = pci_read_config32(dev, STRPFUSECFG); - if (config && config->pcie_wake_enable) + if (config->pcie_wake_enable) southcluster_smm_save_param( SMM_SAVE_PARAM_PCIE_WAKE_ENABLE, 1); } diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index e0e22f220e..38a0c2e693 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -124,7 +124,7 @@ void soc_memory_init_params(struct romstage_params *params, return; } - config = dev->chip_info; + config = config_of(dev); printk(BIOS_DEBUG, "Updating UPD values for MemoryInit\n"); upd->PcdMrcInitTsegSize = CONFIG(HAVE_SMI_HANDLER) ? config->PcdMrcInitTsegSize : 0; diff --git a/src/soc/intel/braswell/sd.c b/src/soc/intel/braswell/sd.c index 2f3dadb1d0..3816fc46e2 100644 --- a/src/soc/intel/braswell/sd.c +++ b/src/soc/intel/braswell/sd.c @@ -33,14 +33,11 @@ static void sd_init(struct device *dev) { - struct soc_intel_braswell_config *config = dev->chip_info; + struct soc_intel_braswell_config *config = config_of(dev); printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); - if (config == NULL) - return; - if (config->sdcard_cap_low != 0 || config->sdcard_cap_high != 0) { printk(BIOS_DEBUG, "Overriding SD Card controller caps.\n"); pci_write_config32(dev, CAP_OVERRIDE_LOW, diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index bf9f689c2a..67e941c511 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -286,7 +286,7 @@ static void sc_init(struct device *dev) const unsigned long ilb_base = ILB_BASE_ADDRESS; void *gen_pmcon1 = (void *)(PMC_BASE_ADDRESS + GEN_PMCON1); const struct soc_irq_route *ir = &global_soc_irq_route; - struct soc_intel_braswell_config *config = dev->chip_info; + struct soc_intel_braswell_config *config = config_of(dev); printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); diff --git a/src/soc/intel/braswell/xhci.c b/src/soc/intel/braswell/xhci.c index 6c9048238f..42288f9e18 100644 --- a/src/soc/intel/braswell/xhci.c +++ b/src/soc/intel/braswell/xhci.c @@ -33,9 +33,9 @@ static void xhci_init(struct device *dev) { - struct soc_intel_braswell_config *config = dev->chip_info; + struct soc_intel_braswell_config *config = config_of(dev); - if (config && config->usb_comp_bg) { + if (config->usb_comp_bg) { struct reg_script ops[] = { REG_IOSF_WRITE(IOSF_PORT_USBPHY, USBPHY_COMPBG, config->usb_comp_bg), |