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authorPatrick Georgi <pgeorgi@google.com>2021-02-12 13:49:11 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-15 11:30:40 +0000
commit6b688f5329e560ef432f6ea281b2fe3d905ef297 (patch)
tree831ff654f7477b293421e38b8ed880f2cc740386 /src/soc/intel/braswell
parent036d66be051c4aeeac3b6220974e93645489c27d (diff)
src: use ARRAY_SIZE where possible
Generated with a variant of https://coccinelle.gitlabpages.inria.fr/website/rules/array.cocci Change-Id: I083704fd48faeb6c67bba3367fbcfe554a9f7c66 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50594 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r--src/soc/intel/braswell/tsc_freq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/tsc_freq.c b/src/soc/intel/braswell/tsc_freq.c
index ae0cce3cae..5c10dd58d0 100644
--- a/src/soc/intel/braswell/tsc_freq.c
+++ b/src/soc/intel/braswell/tsc_freq.c
@@ -20,7 +20,7 @@ unsigned int cpu_bus_freq_khz(void)
{
msr_t clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL);
- if ((clk_info.lo & 0xf) < (sizeof(cpu_bus_clk_freq_table) / sizeof(unsigned int)))
+ if ((clk_info.lo & 0xf) < ARRAY_SIZE(cpu_bus_clk_freq_table))
return cpu_bus_clk_freq_table[clk_info.lo & 0xf];
return 0;