diff options
author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-07-13 02:20:27 +0200 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-07-13 19:45:59 +0000 |
commit | 6a00113de8b9060a7227bcfa79b3786e3e592a33 (patch) | |
tree | 467f5653272ed2d16f6d8033ed8cd0e7391fb426 /src/soc/intel/braswell | |
parent | 9f244a5494192707bfbb72e60f17411e9a35434a (diff) |
Rename __attribute__((packed)) --> __packed
Also unify __attribute__ ((..)) to __attribute__((..)) and
handle ((__packed__)) like ((packed))
Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/15921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r-- | src/soc/intel/braswell/include/soc/device_nvs.h | 3 | ||||
-rw-r--r-- | src/soc/intel/braswell/include/soc/gpio.h | 3 | ||||
-rw-r--r-- | src/soc/intel/braswell/include/soc/nvs.h | 3 | ||||
-rw-r--r-- | src/soc/intel/braswell/include/soc/pm.h | 3 | ||||
-rw-r--r-- | src/soc/intel/braswell/spi.c | 3 |
5 files changed, 10 insertions, 5 deletions
diff --git a/src/soc/intel/braswell/include/soc/device_nvs.h b/src/soc/intel/braswell/include/soc/device_nvs.h index 6318918b71..268655e7cb 100644 --- a/src/soc/intel/braswell/include/soc/device_nvs.h +++ b/src/soc/intel/braswell/include/soc/device_nvs.h @@ -18,6 +18,7 @@ #define _SOC_DEVICE_NVS_H_ #include <stdint.h> +#include <compiler.h> /* Offset in Global NVS where this structure lives */ #define DEVICE_NVS_OFFSET 0x1000 @@ -59,6 +60,6 @@ typedef struct { /* Extra */ u32 lpe_fw; /* LPE Firmware */ -} __attribute__((packed)) device_nvs_t; +} __packed device_nvs_t; #endif /* _SOC_DEVICE_NVS_H_ */ diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h index 4abc9f47bf..294f176676 100644 --- a/src/soc/intel/braswell/include/soc/gpio.h +++ b/src/soc/intel/braswell/include/soc/gpio.h @@ -18,6 +18,7 @@ #define _SOC_GPIO_H_ #include <stdint.h> +#include <compiler.h> #include <arch/io.h> #include <soc/gpio_defs.h> #include <soc/iomap.h> @@ -394,7 +395,7 @@ struct soc_gpio_map { u32 wake_mask:1; u32 is_gpio:1; u32 skip_config:1; -} __attribute__ ((packed)); +} __packed; struct soc_gpio_config { const struct soc_gpio_map *north; diff --git a/src/soc/intel/braswell/include/soc/nvs.h b/src/soc/intel/braswell/include/soc/nvs.h index d3dfd28320..80b0759d76 100644 --- a/src/soc/intel/braswell/include/soc/nvs.h +++ b/src/soc/intel/braswell/include/soc/nvs.h @@ -19,6 +19,7 @@ #define _SOC_NVS_H_ #include <rules.h> +#include <compiler.h> #include <vendorcode/google/chromeos/gnvs.h> #include <soc/device_nvs.h> @@ -68,7 +69,7 @@ typedef struct { /* LPSS (0x1000) */ device_nvs_t dev; -} __attribute__((packed)) global_nvs_t; +} __packed global_nvs_t; void acpi_create_gnvs(global_nvs_t *gnvs); #if ENV_SMM diff --git a/src/soc/intel/braswell/include/soc/pm.h b/src/soc/intel/braswell/include/soc/pm.h index 3d11330efb..5f809edecd 100644 --- a/src/soc/intel/braswell/include/soc/pm.h +++ b/src/soc/intel/braswell/include/soc/pm.h @@ -17,6 +17,7 @@ #ifndef _SOC_PM_H_ #define _SOC_PM_H_ +#include <compiler.h> #include <arch/acpi.h> #define IOCOM1 0x3f8 @@ -221,7 +222,7 @@ struct chipset_power_state { uint32_t gen_pmcon1; uint32_t gen_pmcon2; int prev_sleep_state; -} __attribute__((packed)); +} __packed; struct chipset_power_state *fill_power_state(void); diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c index 4bdcdbff8f..3fc9ba1114 100644 --- a/src/soc/intel/braswell/spi.c +++ b/src/soc/intel/braswell/spi.c @@ -26,6 +26,7 @@ #include <spi_flash.h> #include <spi-generic.h> #include <stdint.h> +#include <compiler.h> #include <stdlib.h> #include <string.h> @@ -80,7 +81,7 @@ typedef struct ich9_spi_regs { uint16_t preop; uint16_t optype; uint8_t opmenu[8]; -} __attribute__((packed)) ich9_spi_regs; +} __packed ich9_spi_regs; typedef struct ich_spi_controller { int locked; |