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authorFelix Singer <felixsinger@posteo.net>2022-12-12 00:46:05 +0100
committerFelix Singer <felixsinger@posteo.net>2022-12-12 22:12:13 +0000
commite4c30044f2773094f77106dc85940c7ba23ac0af (patch)
tree16e7c9aa5fff3d8dcaa6021a8d4e84fef551cdbd /src/soc/intel/braswell
parent9a37ae6ef6c3d056d452372c0dc130d075bb9e7b (diff)
soc/intel/acpi: Replace Add(a,b,c) with ASL 2.0 syntax
Replace `Add (a, b, c)` with `c = a + b`, respectively `a += b` where possible. Change-Id: I96390f565d6c1ca0f4e06db9ad07af784051650c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70622 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r--src/soc/intel/braswell/acpi/dptf/dptf.asl2
-rw-r--r--src/soc/intel/braswell/acpi/gpio.asl8
-rw-r--r--src/soc/intel/braswell/acpi/lpc.asl2
-rw-r--r--src/soc/intel/braswell/acpi/southcluster.asl2
4 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/braswell/acpi/dptf/dptf.asl b/src/soc/intel/braswell/acpi/dptf/dptf.asl
index 939db166a6..5047fca11f 100644
--- a/src/soc/intel/braswell/acpi/dptf/dptf.asl
+++ b/src/soc/intel/braswell/acpi/dptf/dptf.asl
@@ -63,7 +63,7 @@ Device (DPTF)
Multiply (Arg0, 10, Local0)
/* Convert to Kelvin */
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
diff --git a/src/soc/intel/braswell/acpi/gpio.asl b/src/soc/intel/braswell/acpi/gpio.asl
index ee26b3c3c2..2cf74a6d70 100644
--- a/src/soc/intel/braswell/acpi/gpio.asl
+++ b/src/soc/intel/braswell/acpi/gpio.asl
@@ -22,7 +22,7 @@ Device (GPSW)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
- Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPSOUTHWEST, RBAS)
+ RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPSOUTHWEST
Return (^RBUF)
}
@@ -51,7 +51,7 @@ Device (GPNC)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
- Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPNORTH, RBAS)
+ RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPNORTH
Return (^RBUF)
}
@@ -80,7 +80,7 @@ Device (GPEC)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
- Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPEAST, RBAS)
+ RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPEAST
Return (^RBUF)
}
@@ -109,7 +109,7 @@ Device (GPSE)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
- Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPSOUTHEAST, RBAS)
+ RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPSOUTHEAST
Return (^RBUF)
}
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl
index 76af8fd20c..2b540180a7 100644
--- a/src/soc/intel/braswell/acpi/lpc.asl
+++ b/src/soc/intel/braswell/acpi/lpc.asl
@@ -39,7 +39,7 @@ Device (LPCB)
CreateDwordField (^RBUF, ^FBAR._LEN, FLEN)
Multiply(CONFIG_COREBOOT_ROMSIZE_KB, 1024, Local0)
Store(Local0, FLEN)
- Add(Subtract(0xffffffff, Local0), 1, FBAS)
+ FBAS = Subtract(0xffffffff, Local0) + 1
Return (^RBUF)
}
}
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl
index 0e17686f8f..3b33a795a9 100644
--- a/src/soc/intel/braswell/acpi/southcluster.asl
+++ b/src/soc/intel/braswell/acpi/southcluster.asl
@@ -175,7 +175,7 @@ Method (_CRS, 0, Serialized)
/* TOLM is BMBOUND accessible from IOSF so is saved in NVS */
Store (\TOLM, PMIN)
Store (Subtract(CONFIG_ECAM_MMCONF_BASE_ADDRESS, 1), PMAX)
- Add (Subtract (PMAX, PMIN), 1, PLEN)
+ PLEN = Subtract (PMAX, PMIN) + 1
Return (MCRS)
}