From e4c30044f2773094f77106dc85940c7ba23ac0af Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Mon, 12 Dec 2022 00:46:05 +0100 Subject: soc/intel/acpi: Replace Add(a,b,c) with ASL 2.0 syntax Replace `Add (a, b, c)` with `c = a + b`, respectively `a += b` where possible. Change-Id: I96390f565d6c1ca0f4e06db9ad07af784051650c Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/70622 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas --- src/soc/intel/braswell/acpi/dptf/dptf.asl | 2 +- src/soc/intel/braswell/acpi/gpio.asl | 8 ++++---- src/soc/intel/braswell/acpi/lpc.asl | 2 +- src/soc/intel/braswell/acpi/southcluster.asl | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) (limited to 'src/soc/intel/braswell') diff --git a/src/soc/intel/braswell/acpi/dptf/dptf.asl b/src/soc/intel/braswell/acpi/dptf/dptf.asl index 939db166a6..5047fca11f 100644 --- a/src/soc/intel/braswell/acpi/dptf/dptf.asl +++ b/src/soc/intel/braswell/acpi/dptf/dptf.asl @@ -63,7 +63,7 @@ Device (DPTF) Multiply (Arg0, 10, Local0) /* Convert to Kelvin */ - Add (Local0, 2732, Local0) + Local0 += 2732 Return (Local0) } diff --git a/src/soc/intel/braswell/acpi/gpio.asl b/src/soc/intel/braswell/acpi/gpio.asl index ee26b3c3c2..2cf74a6d70 100644 --- a/src/soc/intel/braswell/acpi/gpio.asl +++ b/src/soc/intel/braswell/acpi/gpio.asl @@ -22,7 +22,7 @@ Device (GPSW) Method (_CRS) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPSOUTHWEST, RBAS) + RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPSOUTHWEST Return (^RBUF) } @@ -51,7 +51,7 @@ Device (GPNC) Method (_CRS) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPNORTH, RBAS) + RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPNORTH Return (^RBUF) } @@ -80,7 +80,7 @@ Device (GPEC) Method (_CRS) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPEAST, RBAS) + RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPEAST Return (^RBUF) } @@ -109,7 +109,7 @@ Device (GPSE) Method (_CRS) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPSOUTHEAST, RBAS) + RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPSOUTHEAST Return (^RBUF) } diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl index 76af8fd20c..2b540180a7 100644 --- a/src/soc/intel/braswell/acpi/lpc.asl +++ b/src/soc/intel/braswell/acpi/lpc.asl @@ -39,7 +39,7 @@ Device (LPCB) CreateDwordField (^RBUF, ^FBAR._LEN, FLEN) Multiply(CONFIG_COREBOOT_ROMSIZE_KB, 1024, Local0) Store(Local0, FLEN) - Add(Subtract(0xffffffff, Local0), 1, FBAS) + FBAS = Subtract(0xffffffff, Local0) + 1 Return (^RBUF) } } diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 0e17686f8f..3b33a795a9 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -175,7 +175,7 @@ Method (_CRS, 0, Serialized) /* TOLM is BMBOUND accessible from IOSF so is saved in NVS */ Store (\TOLM, PMIN) Store (Subtract(CONFIG_ECAM_MMCONF_BASE_ADDRESS, 1), PMAX) - Add (Subtract (PMAX, PMIN), 1, PLEN) + PLEN = Subtract (PMAX, PMIN) + 1 Return (MCRS) } -- cgit v1.2.3