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| author | Furquan Shaikh <furquan@chromium.org> | 2017-05-02 19:43:20 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-05 23:40:51 +0200 |
| commit | f1db5fdb4d03b4766cf23e4b04a05b0fc05586a0 (patch) | |
| tree | cd4d04900e1b5d3e27d4d13cdfa39297e661e2aa /src/soc/intel/braswell/spi_loading.c | |
| parent | 35418f9814a64073550eb63a3bcb2e79021347cb (diff) | |
soc/intel/common: Provide common block fast_spi_flash_ctrlr
Now that we have a common block driver for fast spi flash controller,
provide spi_ctrlr structure that can be used by different platforms
for defining the bus-ctrlr mapping. Only cs 0 is considered valid.
Change-Id: I7228ae885018d1e23e6e80dd8ce227b0d99d84a6
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19575
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/spi_loading.c')
0 files changed, 0 insertions, 0 deletions