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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2016-10-13 11:41:50 -0400 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-16 23:03:40 +0100 |
| commit | 081b72405a38551039dddae85c9ddf2e59ddf5e4 (patch) | |
| tree | 90ad935d384f19b81782b8f6dfcc53efa98bf660 /src/soc/intel/braswell/spi_loading.c | |
| parent | c3cd6d7582b3a493e32055085049d65f5bee46f8 (diff) | |
amd/gardenia: Update xHCI configuration
Remove a duplicated check and setting for xHCI during the
AMD_INIT_RESET callout. This is handled by the wrapper. Also
remove nearby commented code. EcChannel0 is not a member of
FCH_RESET_DATA_BLOCK.
Leave the check in AMD_INIT_ENV. Although AGESA honors what
was previously requested, additional settings depend on the
state of Usb.Xhci0Enable.
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit ca862fbacbe80b1345ad6f23262a9769f05c50fd)
Change-Id: I45a5123e158cd7399d6d286999371d4a0e0fa963
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/17223
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/braswell/spi_loading.c')
0 files changed, 0 insertions, 0 deletions