diff options
| author | Simon Yang <simon1.yang@intel.com> | 2024-10-20 17:54:02 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-10-22 04:24:28 +0000 |
| commit | 5775ed215e59fe0d45b422e19458e63f7d46329e (patch) | |
| tree | 139a174f3f5ca79def2bdd400739eb89f7942d6e /src/soc/intel/braswell/sata.c | |
| parent | 5a5f39ce8637f61514da9ce47515126218befb8c (diff) | |
soc/intel/alderlake_n: Fix display flicker issue when using internal FIVR
If project set configure_ext_fivr = 0 will cause
PchFivrVccstIccMaxControl do not set correctly.
BUG=b:361831628
TEST=Verified on Teliks360 that affected DUTs.
Change-Id: I816de9c0c507aad3b73ab29e9f72048704f4662d
Signed-off-by: Simon Yang <simon1.yang@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84812
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Qinghong Zeng <zengqinghong@huaqin.corp-partner.google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Diffstat (limited to 'src/soc/intel/braswell/sata.c')
0 files changed, 0 insertions, 0 deletions