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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:42:14 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-21 16:15:25 +0000 |
| commit | 2854f40668f37c09c5afa5e7ac670adfaacb44b4 (patch) | |
| tree | 2c518c284f486a4c68b2babe10d55779c61cc7d5 /src/soc/intel/braswell/romstage | |
| parent | ee65079c9657f8e1f8ac1ea3d562b531368eecb7 (diff) | |
src/soc/intel: Drop unneeded empty lines
Change-Id: Id93aab5630e928ee4d7e957801e15a4cc8739fae
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/romstage')
| -rw-r--r-- | src/soc/intel/braswell/romstage/romstage.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index b6b20b9e1b..a82a4abc28 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -11,7 +11,6 @@ #include "../chip.h" - static struct chipset_power_state power_state; static void migrate_power_state(int is_recovery) @@ -83,7 +82,6 @@ int chipset_prev_sleep_state(struct chipset_power_state *ps) return prev_sleep_state; } - /* SOC initialization after RAM is enabled */ void soc_after_ram_init(struct romstage_params *params) { |