From 2854f40668f37c09c5afa5e7ac670adfaacb44b4 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 19 Aug 2020 21:42:14 +0200 Subject: src/soc/intel: Drop unneeded empty lines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Id93aab5630e928ee4d7e957801e15a4cc8739fae Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/44594 Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/soc/intel/braswell/romstage/romstage.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/intel/braswell/romstage') diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index b6b20b9e1b..a82a4abc28 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -11,7 +11,6 @@ #include "../chip.h" - static struct chipset_power_state power_state; static void migrate_power_state(int is_recovery) @@ -83,7 +82,6 @@ int chipset_prev_sleep_state(struct chipset_power_state *ps) return prev_sleep_state; } - /* SOC initialization after RAM is enabled */ void soc_after_ram_init(struct romstage_params *params) { -- cgit v1.2.3