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authorElyes Haouas <ehaouas@noos.fr>2023-09-17 10:22:02 +0200
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-18 01:21:22 +0000
commita506451d9fbf8ab520295934076a328f734bf401 (patch)
tree28c697c3ab3f73c8f3e355678500107bb3af4749 /src/soc/intel/braswell/pmutil.c
parent0c7e93f974d3205f90478793628789b7a9184d6c (diff)
soc/intel/braswell: Use {read,write}32p()
Change-Id: I00894565efc405a47348236ad7df50071a843487 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77972 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/pmutil.c')
-rw-r--r--src/soc/intel/braswell/pmutil.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/braswell/pmutil.c b/src/soc/intel/braswell/pmutil.c
index ea7f0caf2e..f00eb4b869 100644
--- a/src/soc/intel/braswell/pmutil.c
+++ b/src/soc/intel/braswell/pmutil.c
@@ -319,12 +319,12 @@ void clear_pmc_status(void)
uint32_t prsts;
uint32_t gen_pmcon1;
- prsts = read32((void *)(PMC_BASE_ADDRESS + PRSTS));
- gen_pmcon1 = read32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1));
+ prsts = read32p(PMC_BASE_ADDRESS + PRSTS);
+ gen_pmcon1 = read32p(PMC_BASE_ADDRESS + GEN_PMCON1);
/* Clear the status bits. The RPS field is cleared on a 0 write. */
- write32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1), gen_pmcon1 & ~RPS);
- write32((void *)(PMC_BASE_ADDRESS + PRSTS), prsts);
+ write32p(PMC_BASE_ADDRESS + GEN_PMCON1, gen_pmcon1 & ~RPS);
+ write32p(PMC_BASE_ADDRESS + PRSTS, prsts);
}
int rtc_failure(void)