diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-04 14:45:13 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-29 09:38:22 +0000 |
| commit | 56d913eedb2f4f0df0b2210f139d857a829bdf96 (patch) | |
| tree | e65099a8e855295bda9765823320dc4ec9562ee8 /src/soc/intel/braswell/include | |
| parent | 2d33c3e6c3ab2427377b9b532b6590aa87340c4e (diff) | |
soc/intel/braswell: Use sb/intel/common/spi.c
This common implementation is compatible.
Change-Id: I540f73514f17d3b135c3222facfe23170d2bb0c8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33205
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/braswell/include')
| -rw-r--r-- | src/soc/intel/braswell/include/soc/spi.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/intel/braswell/include/soc/spi.h b/src/soc/intel/braswell/include/soc/spi.h index 2d275450fa..47de9da55b 100644 --- a/src/soc/intel/braswell/include/soc/spi.h +++ b/src/soc/intel/braswell/include/soc/spi.h @@ -22,14 +22,7 @@ /* These registers live behind SPI_BASE_ADDRESS. */ #define HSFSTS 0x04 -#define FDATA0 0x10 # define FLOCKDN (0x1 << 15) -#define SSFS 0x90 -# define CYCLE_DONE_STATUS (0x1 << 2) -# define FLASH_CYCLE_ERROR (0x1 << 3) -#define SSFC 0x91 -# define SPI_CYCLE_GO (0x1 << 1) -# define DATA_CYCLE (0x1 << 14) #define PREOP 0x94 #define OPTYPE 0x96 # define SPI_OPTYPE_RD_NOADDR 0x00 /* Read, no address */ |