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| author | Morgan Jang <Morgan_Jang@wiwynn.com> | 2020-10-07 14:02:49 +0800 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-28 10:09:32 +0000 |
| commit | bdd863689dd2902e2999971b8bf9ea3d811aab8a (patch) | |
| tree | 819d489e9cecb2b31f7132d3a97035e1b2afa57d /src/soc/intel/braswell/fadt.c | |
| parent | 160cb331fca8d7a389b25bce30cb3e3cc3a7b4cc (diff) | |
src/soc/intel/xeon_sp: Fill in the cache information in SMBIOS type 7
TEST=Execute "dmidecode -t 7" to check if cache error correction type
and cache sram type is correct for each cache level
Change-Id: Ibe7c6ad03a83a6a3b2c7dfcfafaa619e690a418d
Signed-off-by: Morgan Jang <Morgan_Jang@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46119
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/braswell/fadt.c')
0 files changed, 0 insertions, 0 deletions