diff options
| author | Frans Hendriks <fhendriks@eltan.com> | 2019-06-18 12:18:55 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-06-20 15:41:37 +0000 |
| commit | 863853cd2d8e01db2045e73d96c502e4ecba8ad1 (patch) | |
| tree | f3c64fa27ccce037ca5b47a45a41ae7014ba4083 /src/soc/intel/braswell/Makefile.inc | |
| parent | e48be35bca9a0656d1becb0c8a030a11eb8ffaa7 (diff) | |
soc/intel/braswell/smbus.c: Add support for i2c mode block write
Intel Braswell supports i2c block write using SMBus controller.
smbus_i2c_block_write() is added to configure SMBus controller in i2c
mode before calling do_i2c_block_write().
Add smbus.c to ramstage.
BUG=N/A
TEST=Verify LCD display is working on Facebook FBG-1701
Change-Id: I50c1a03f624b3ab3b987d4f3b1d15dac4374e48a
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33225
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/braswell/Makefile.inc')
| -rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 1017d80c65..cc111da485 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -35,6 +35,7 @@ ramstage-$(CONFIG_ELOG) += elog.c ramstage-y += emmc.c ramstage-y += gpio.c ramstage-y += gfx.c +ramstage-y += smbus.c ramstage-y += gpio_support.c ramstage-y += iosf.c |