diff options
| author | Martin Roth <martin.roth@se-eng.com> | 2014-12-07 14:57:26 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-12-08 05:40:24 +0100 |
| commit | 99a3bba171695804624b8426052de0cd552f1455 (patch) | |
| tree | 14ddb97ccbabe30f448ac768729b865f191ee501 /src/soc/intel/baytrail/southcluster.c | |
| parent | 7c96629e94a0e37d8bb565f19d3c20865da50bec (diff) | |
intel/baytrail: Spelling fixes
Change-Id: Ideb58634a029d55746421ad1ea4b80811bca403c
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7705
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/soc/intel/baytrail/southcluster.c')
| -rw-r--r-- | src/soc/intel/baytrail/southcluster.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 500a13d1e2..5274b034f2 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -158,7 +158,7 @@ static void com1_configure_resume(device_t dev) { const uint16_t port = 0x3f8; - /* Is the UART I/O port eanbled? */ + /* Is the UART I/O port enabled? */ if (!(pci_read_config32(dev, UART_CONT) & 1)) return; @@ -223,7 +223,7 @@ static void sc_init(device_t dev) * Common code for the south cluster devices. */ -/* Set bit in function disble register to hide this device. */ +/* Set bit in function disable register to hide this device. */ static void sc_disable_devfn(device_t dev) { const unsigned long func_dis = PMC_BASE_ADDRESS + FUNC_DIS; |