From 99a3bba171695804624b8426052de0cd552f1455 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sun, 7 Dec 2014 14:57:26 -0700 Subject: intel/baytrail: Spelling fixes Change-Id: Ideb58634a029d55746421ad1ea4b80811bca403c Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/7705 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/soc/intel/baytrail/southcluster.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/baytrail/southcluster.c') diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 500a13d1e2..5274b034f2 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -158,7 +158,7 @@ static void com1_configure_resume(device_t dev) { const uint16_t port = 0x3f8; - /* Is the UART I/O port eanbled? */ + /* Is the UART I/O port enabled? */ if (!(pci_read_config32(dev, UART_CONT) & 1)) return; @@ -223,7 +223,7 @@ static void sc_init(device_t dev) * Common code for the south cluster devices. */ -/* Set bit in function disble register to hide this device. */ +/* Set bit in function disable register to hide this device. */ static void sc_disable_devfn(device_t dev) { const unsigned long func_dis = PMC_BASE_ADDRESS + FUNC_DIS; -- cgit v1.2.3