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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-25 07:11:05 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-08-03 17:46:36 +0200 |
| commit | 3d0e3cf4b125dfda236d6978adea5f5d40fd78e8 (patch) | |
| tree | f0b83e01591f3eb34084ad038cf45e1ea4cc7760 /src/soc/intel/baytrail/pcie.c | |
| parent | 14d09264a2b64c38bf4e5cf309947a8a2fbafc6d (diff) | |
soc/intel/quark: Initialize MTRRs in bootblock
Initialize the MTRRs for use by bootblock and romstage.
Display the MTRRs.
TEST=Build and run on Galileo Gen2.
Change-Id: Ib1d422c738820163f54771c65034ae77301237ec
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15861
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/pcie.c')
0 files changed, 0 insertions, 0 deletions