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authorAaron Durbin <adurbin@chromium.org>2013-10-11 00:26:04 -0500
committerAaron Durbin <adurbin@google.com>2014-02-13 16:55:56 +0100
commit3ccb3ce4157df2cdab6d9a2a02cc609ae2814567 (patch)
tree1fb281340087804d982b02df13fd76d6a962cebe /src/soc/intel/baytrail/iosf.c
parent1ce0b3022c723ca7c9f00cc884e8e3282cb0dcdb (diff)
baytrail: print dram configuration
After running the MRC blob print out some information on the training: MRC version, number channels, DDR3 type, and DRAM frequency. Example output: MRC v0.90 2 channels of DDR3 @ 1066MHz Apparently there are two dunit IOSF ports -- 1 for each channel. However, certain registers really on live in channel 0. Thus, there was some changes to dunit support in the iosf area. BUG=chrome-os-partner:22875 BRANCH=None TEST=Built and booted bayleybay in different configs. Change-Id: Ib306432b55f9222b4eb3d14b2467bc0e7617e24f Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172770 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/4882 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/iosf.c')
-rw-r--r--src/soc/intel/baytrail/iosf.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c
index 00a3269da0..e35e34f168 100644
--- a/src/soc/intel/baytrail/iosf.c
+++ b/src/soc/intel/baytrail/iosf.c
@@ -70,6 +70,21 @@ uint32_t iosf_dunit_read(int reg)
return read_iosf_reg(MDR_REG);
}
+uint32_t iosf_dunit_ch0_read(int reg)
+{
+ return iosf_dunit_read(reg);
+}
+
+uint32_t iosf_dunit_ch1_read(int reg)
+{
+ uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SYSMEMC) |
+ IOSF_PORT(IOSF_PORT_DUNIT_CH1) | IOSF_REG(reg) |
+ IOSF_BYTE_EN;
+
+ write_iosf_reg(MCR_REG, cr);
+ return read_iosf_reg(MDR_REG);
+}
+
void iosf_dunit_write(int reg, uint32_t val)
{
uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SYSMEMC) |