diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-12-09 13:31:47 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-12-14 06:35:11 +0000 |
| commit | 10929ef008f433ce3a500b79534016bfa8456196 (patch) | |
| tree | fd73081808b92a47eee353e2617a250c2553e193 /src/soc/intel/baytrail/chip.c | |
| parent | b25aeb59379d04f4ad6e120e729286a341d301c8 (diff) | |
soc/intel/meteorlake: Fill ucode loading UPD if USE_FSP_MP_INIT enable
This patch calls into a helper function to fill `2nd microcode loading
FSP UPD` if FSP is running CPU feature programming.
This patch is backported from
commit fad1cb062e29c5e3a5bcfb6b67c3ce01ed765254 (soc/intel/alderlake:
Fill ucode loading UPD if USE_FSP_MP_INIT enable).
Change-Id: Id8c8bfd844b3213cc260df20c359b0b1437e3e28
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70599
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/baytrail/chip.c')
0 files changed, 0 insertions, 0 deletions