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authorAngel Pons <th3fanbus@gmail.com>2020-07-07 17:17:51 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-09 12:47:47 +0000
commit26b49cc9a3f027ad6af56e5f6fd572805fe0f30f (patch)
tree87c9b0cbf3c0863067534eced5598860edd67c95 /src/soc/intel/baytrail/bootblock/bootblock.c
parentb5320b2dc1a0c2f710929f4a0aa17529b973b62f (diff)
soc/intel/baytrail: Align whitespace and comments
This reduces the differences between Bay Trail and Braswell. Tested with BUILD_TIMELESS=1, Google Ninja remains identical. Change-Id: Idfdb1e6ec9bd0c1a11ef36ce0434ed5e12895187 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43186 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/soc/intel/baytrail/bootblock/bootblock.c')
-rw-r--r--src/soc/intel/baytrail/bootblock/bootblock.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/src/soc/intel/baytrail/bootblock/bootblock.c b/src/soc/intel/baytrail/bootblock/bootblock.c
index 54e7261d3b..0f3980cefb 100644
--- a/src/soc/intel/baytrail/bootblock/bootblock.c
+++ b/src/soc/intel/baytrail/bootblock/bootblock.c
@@ -13,10 +13,11 @@ static void setup_mmconfig(void)
{
uint32_t reg;
- /* Set up the MMCONF range. The register lives in the BUNIT. The
- * IO variant of the config access needs to be used initially to
- * properly configure as the IOSF access registers live in PCI
- * config space. */
+ /*
+ * Set up the MMCONF range. The register lives in the BUNIT. The IO variant of the
+ * config access needs to be used initially to properly configure as the IOSF access
+ * registers live in PCI config space.
+ */
reg = 0;
/* Clear the extended register. */
pci_io_write_config32(IOSF_PCI_DEV, MCRX_REG, reg);
@@ -98,11 +99,11 @@ static void byt_config_com1_and_enable(void)
just pick the one that is called first. */
void bootblock_early_northbridge_init(void)
{
- /* Allow memory-mapped PCI config access. */
+ /* Allow memory-mapped PCI config access */
setup_mmconfig();
+ /* Early chipset initialization */
program_base_addresses();
-
tco_disable();
if (CONFIG(ENABLE_BUILTIN_COM1))