diff options
author | Felix Singer <felixsinger@posteo.net> | 2022-12-12 07:30:07 +0100 |
---|---|---|
committer | Felix Singer <felixsinger@posteo.net> | 2022-12-14 00:52:05 +0000 |
commit | 476fe6ae7e14c10d7411abf1ed447cf54326dd1e (patch) | |
tree | e8e99ec935e7d5cce2ed29ef03d9ea5c86976253 /src/soc/intel/baytrail/acpi/dptf | |
parent | 3e90ce547c5f803c840c770570b564c6859c7c6f (diff) |
soc/intel/baytrail/acpi: Replace Store(a,b) with ASL 2.0 syntax
Replace `Store (a, b)` with `b = a`.
Change-Id: Ic171f3343bb35e43be5fdb50c5c926eede6a1d93
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/soc/intel/baytrail/acpi/dptf')
-rw-r--r-- | src/soc/intel/baytrail/acpi/dptf/charger.asl | 6 | ||||
-rw-r--r-- | src/soc/intel/baytrail/acpi/dptf/cpu.asl | 6 | ||||
-rw-r--r-- | src/soc/intel/baytrail/acpi/dptf/thermal.asl | 2 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/baytrail/acpi/dptf/charger.asl b/src/soc/intel/baytrail/acpi/dptf/charger.asl index e7ede39a63..f8eac66e32 100644 --- a/src/soc/intel/baytrail/acpi/dptf/charger.asl +++ b/src/soc/intel/baytrail/acpi/dptf/charger.asl @@ -26,7 +26,7 @@ Device (TCHG) Method (PPPC) { /* Convert size of PPSS table to index */ - Store (SizeOf (\_SB.CHPS), Local0) + Local0 = SizeOf (\_SB.CHPS) Local0-- /* Check if charging is disabled (AC removed) */ @@ -45,8 +45,8 @@ Device (TCHG) Method (SPPC, 1) { /* Retrieve Control (index 4) for specified PPSS level */ - Store (DeRefOf (Index (DeRefOf (Index - (\_SB.CHPS, ToInteger (Arg0))), 4)), Local0) + Local0 = DeRefOf (Index (DeRefOf (Index + (\_SB.CHPS, ToInteger (Arg0))), 4)) /* Pass Control value to EC to limit charging */ \_SB.PCI0.LPCB.EC0.CHGS (Local0) diff --git a/src/soc/intel/baytrail/acpi/dptf/cpu.asl b/src/soc/intel/baytrail/acpi/dptf/cpu.asl index cca1423356..9affbea587 100644 --- a/src/soc/intel/baytrail/acpi/dptf/cpu.asl +++ b/src/soc/intel/baytrail/acpi/dptf/cpu.asl @@ -73,7 +73,7 @@ Device (TCPU) Method (_TDL) { If (CondRefOf (\_SB.CP00._TSS)) { - Store (SizeOf (\_SB.CP00._TSS ()), Local0) + Local0 = SizeOf (\_SB.CP00._TSS ()) Local0-- Return (Local0) } Else { @@ -92,7 +92,7 @@ Device (TCPU) Method (SPPC, 1) { - Store (Arg0, \PPCM) + \PPCM = Arg0 /* Notify OS to re-read _PPC limit on each CPU */ \PPCN () @@ -116,7 +116,7 @@ Device (TCPU) If (CondRefOf (\_SB.MPDL)) { Return (\_SB.MPDL) } ElseIf (CondRefOf (\_SB.CP00._PSS)) { - Store (SizeOf (\_SB.CP00._PSS ()), Local0) + Local0 = SizeOf (\_SB.CP00._PSS ()) Local0-- Return (Local0) } Else { diff --git a/src/soc/intel/baytrail/acpi/dptf/thermal.asl b/src/soc/intel/baytrail/acpi/dptf/thermal.asl index 93d79284c2..74287d9862 100644 --- a/src/soc/intel/baytrail/acpi/dptf/thermal.asl +++ b/src/soc/intel/baytrail/acpi/dptf/thermal.asl @@ -6,7 +6,7 @@ #if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { - Store (ToInteger (Arg0), Local0) + Local0 = ToInteger (Arg0) #ifdef DPTF_TSR0_SENSOR_ID If (Local0 == DPTF_TSR0_SENSOR_ID) { |