diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-12-11 17:15:45 -0800 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-10 06:31:07 +0200 |
| commit | cffe795dc1516607421bf770eab45076087fc461 (patch) | |
| tree | 785875b9c3e036ce05b800bb5a8e9a6438342e39 /src/soc/intel/baytrail/Makefile.inc | |
| parent | bc5b557a814be2790d4cea4267046dd8e3fdcb72 (diff) | |
baytrail: initialize perf/power registers
According to the reference code all these registers
need to be set to their best known values.
BUG=chrome-os-partner:24345
BRANCH=None
TEST=Built and booted. Suspend and wake. No idea about
observable impact yet.
Change-Id: I0e31505a165eee1d177e5d726edcfa6947430476
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179749
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5008
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/Makefile.inc')
| -rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 48fb4b448a..e2a949f74b 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -44,6 +44,7 @@ ramstage-y += emmc.c ramstage-y += lpss.c ramstage-y += pcie.c ramstage-y += sd.c +ramstage-y += perf_power.c # Remove as ramstage gets fleshed out ramstage-y += placeholders.c |