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authorArthur Heymans <arthur@aheymans.xyz>2018-11-29 14:16:49 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-05 13:33:32 +0000
commitd5d20d03fea5d50152fac783cb0985dbaa66d782 (patch)
tree0b020ad67d2a82f5371321d402b54631203e1990 /src/soc/intel/baytrail/Kconfig
parentf6cfbf380488d74f5b420d90d02e59399b83fed9 (diff)
soc/intel/baytrail: Implement POSTCAR stage
Use common code to tear down CAR. Change-Id: I62a70ae35fe92808f180f2b5f21c5899a96c2c16 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/29930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/baytrail/Kconfig')
-rw-r--r--src/soc/intel/baytrail/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 66fcded42d..ece4d61510 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -38,6 +38,8 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_SPI_CONSOLE_SUPPORT
select INTEL_GMA_ACPI
select INTEL_GMA_SWSMISCI
+ select POSTCAR_STAGE
+ select POSTCAR_CONSOLE
config VBOOT
select VBOOT_STARTS_IN_ROMSTAGE