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authorMario Scheithauer <mario.scheithauer@siemens.com>2023-06-15 14:22:22 +0200
committerJakub Czapiga <jacz@semihalf.com>2023-06-19 11:09:19 +0000
commitfeafddba8ed6961237e39debf2361f20a1bcf635 (patch)
tree974db329fb18f5cfe0127fb525464b39e5239f15 /src/soc/intel/apollolake
parent1bbdd0ad012c97fa52d843be9f7b4db337649613 (diff)
soc/intel/apollolake: Switch to snake case for DisableComplianceMode
For a unification of the naming convension, change from pascal case to snake case style for parameter 'DisableComplianceMode'. Change-Id: I9d5605134a753f161a66857c7f78844ae7490cd6 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75854 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r--src/soc/intel/apollolake/chip.c2
-rw-r--r--src/soc/intel/apollolake/chip.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 57aa0858f4..e3bfa1e273 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -607,7 +607,7 @@ static void glk_fsp_silicon_init_params_cb(
/*
* Options to disable XHCI Link Compliance Mode.
*/
- silconfig->DisableComplianceMode = cfg->DisableComplianceMode;
+ silconfig->DisableComplianceMode = cfg->disable_compliance_mode;
/*
* Options to change USB3 ModPhy setting for Integrated Filter value.
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 88ec1ff21b..c1bc0209dc 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -184,7 +184,7 @@ struct soc_intel_apollolake_config {
* disable Compliance Mode. Set TRUE to disable Compliance Mode.
* 0:FALSE(Default), 1:True.
*/
- uint8_t DisableComplianceMode;
+ uint8_t disable_compliance_mode;
/* Options to change USB3 ModPhy setting for the Integrated Filter (IF)
* value. Default is 0 to not changing default IF value (0x12). Set