soc/intel: Drop casts around `soc_read_pmc_base()`

The `soc_read_pmc_base()` function returns an `uintptr_t`, which is then
casted to a pointer type for use with `read32()` and/or `write32()`. But
since commit b324df6a540d154cc9267c0398654f9142aae052 (arch/x86: Provide
readXp/writeXp helpers in arch/mmio.h), the `read32p()` and `write32p()`
functions live in `arch/mmio.h`. These functions use the `uintptr_t type
for the address parameter instead of a pointer type, and using them with
the `soc_read_pmc_base()` function allows dropping the casts to pointer.

Change-Id: Iaf16e6f23d139e6f79360d9a29576406b7b15b07
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>

3 files changed, 7 insertions, 9 deletions

diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index ae202456a0..a28894f044 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -54,14 +54,12 @@ static acpi_cstate_t cstate_map[] = {
 
 uint32_t soc_read_sci_irq_select(void)
 {
-	uintptr_t pmc_bar = soc_read_pmc_base();
-	return read32((void *)pmc_bar + IRQ_REG);
+	return read32p(soc_read_pmc_base() + IRQ_REG);
 }
 
 void soc_write_sci_irq_select(uint32_t scis)
 {
-	uintptr_t pmc_bar = soc_read_pmc_base();
-	write32((void *)pmc_bar + IRQ_REG, scis);
+	write32p(soc_read_pmc_base() + IRQ_REG, scis);
 }
 
 acpi_cstate_t *soc_get_cstate_map(size_t *entries)
diff --git a/src/soc/intel/apollolake/pmc.c b/src/soc/intel/apollolake/pmc.c
index 4cc7670b59..959fb53710 100644
--- a/src/soc/intel/apollolake/pmc.c
+++ b/src/soc/intel/apollolake/pmc.c
@@ -71,10 +71,10 @@ static void set_slp_s3_assertion_width(int width_usecs)
 	uintptr_t gen_pmcon3 = soc_read_pmc_base() + GEN_PMCON3;
 	int setting = choose_slp_s3_assertion_width(width_usecs);
 
-	reg = read32((void *)gen_pmcon3);
+	reg = read32p(gen_pmcon3);
 	reg &= ~SLP_S3_ASSERT_MASK;
 	reg |= setting << SLP_S3_ASSERT_WIDTH_SHIFT;
-	write32((void *)gen_pmcon3, reg);
+	write32p(gen_pmcon3, reg);
 }
 
 void pmc_soc_init(struct device *dev)
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index 891c876c83..06c2d63729 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -227,13 +227,13 @@ uint16_t get_pmbase(void)
 
 void pmc_soc_set_afterg3_en(const bool on)
 {
-	void *const gen_pmcon1 = (void *)(soc_read_pmc_base() + GEN_PMCON1);
+	const uintptr_t gen_pmcon1 = soc_read_pmc_base() + GEN_PMCON1;
 	uint32_t reg32;
 
-	reg32 = read32(gen_pmcon1);
+	reg32 = read32p(gen_pmcon1);
 	if (on)
 		reg32 &= ~SLEEP_AFTER_POWER_FAIL;
 	else
 		reg32 |= SLEEP_AFTER_POWER_FAIL;
-	write32(gen_pmcon1, reg32);
+	write32p(gen_pmcon1, reg32);
 }