diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-12 23:07:52 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-06 13:54:30 +0000 |
| commit | cde4f3b2790d52ef38106c7ba91eea5d53e03a93 (patch) | |
| tree | 72d65b1474c3115d336fae45d6a5990638dfaaef /src/soc/intel/apollolake | |
| parent | a52b93b262582009decf924dbdde9bc1bf856ddb (diff) | |
acpi/gnvs.c: Drop unused pointer to the cbmem console
Change-Id: I7e2018dbccead15fcd84e34df8207120d3a0c57c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64303
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/nvs.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl index a56d2e106c..ad5119cd39 100644 --- a/src/soc/intel/apollolake/acpi/globalnvs.asl +++ b/src/soc/intel/apollolake/acpi/globalnvs.asl @@ -14,7 +14,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) LIDS, 8, // 0x02 - LID State , 8, // 0x03 - AC Power State DPTE, 8, // 0x04 - Enable DPTF - CBMC, 32, // 0x05 - 0x08 - coreboot Memory Console + , 32, // 0x05 - 0x08 - coreboot Memory Console PM1I, 64, // 0x09 - 0x10 - System Wake Source - PM1 Index GPEI, 64, // 0x11 - 0x18 - GPE Wake Source NHLA, 64, // 0x19 - 0x20 - NHLT Address diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h index 95d9ab43a3..c1f575b65e 100644 --- a/src/soc/intel/apollolake/include/soc/nvs.h +++ b/src/soc/intel/apollolake/include/soc/nvs.h @@ -18,7 +18,7 @@ struct __packed global_nvs { uint8_t lids; /* 0x02 - LID State */ uint8_t unused_was_pwrs; /* 0x03 - AC Power State */ uint8_t dpte; /* 0x04 - Enable DPTF */ - uint32_t cbmc; /* 0x05 - 0x08 - coreboot Memory Console */ + uint32_t unused_was_cbmc; /* 0x05 - 0x08 - coreboot Memory Console */ uint64_t pm1i; /* 0x09 - 0x10 - System Wake Source - PM1 Index */ uint64_t gpei; /* 0x11 - 0x18 - GPE Wake Source */ uint64_t nhla; /* 0x19 - 0x20 - NHLT Address */ |