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authorDuncan Laurie <dlaurie@google.com>2018-05-07 15:33:18 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-05-18 12:23:04 +0000
commitbf713b04b6f04ebf91eea40867a5354c958182f4 (patch)
tree26c5cd230df30c7645420eeb8f7ca476e65b15b1 /src/soc/intel/apollolake
parent4721f43390ec732cb2ef82911da098779f4db0c4 (diff)
soc/intel: Add support for USB ACPI code generation
To support generating USB devices in ACPI the platform needs to know how to determine a device name for each USB port, and for any root hubs that may be present. Recent Intel platforms route all ports to an XHCI controller through a root hub. This is supported by considering the root hub to be USB port type 0, the USB 2.0 ports to be type 2, and the USB 3.0 ports to be type 3. This was tested with a Kaby Lake platform by adding entries to the devicetree and checking the resulting SSDT. Change-Id: I527a63bdc64f9243fe57487363ee6d5f60be84ca Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/26174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r--src/soc/intel/apollolake/acpi/xhci.asl24
-rw-r--r--src/soc/intel/apollolake/chip.c36
2 files changed, 59 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/acpi/xhci.asl b/src/soc/intel/apollolake/acpi/xhci.asl
index c07c7079ad..8222cb5ec4 100644
--- a/src/soc/intel/apollolake/acpi/xhci.asl
+++ b/src/soc/intel/apollolake/acpi/xhci.asl
@@ -28,4 +28,28 @@ Device (XHC1) {
{
Return (0xF)
}
+
+ Device (RHUB)
+ {
+ /* Root Hub */
+ Name (_ADR, Zero)
+
+ /* USB2 */
+ Device (HS01) { Name (_ADR, 1) }
+ Device (HS02) { Name (_ADR, 2) }
+ Device (HS03) { Name (_ADR, 3) }
+ Device (HS04) { Name (_ADR, 4) }
+ Device (HS05) { Name (_ADR, 5) }
+ Device (HS06) { Name (_ADR, 6) }
+ Device (HS07) { Name (_ADR, 7) }
+ Device (HS08) { Name (_ADR, 8) }
+
+ /* USB3 */
+ Device (SS01) { Name (_ADR, 9) }
+ Device (SS02) { Name (_ADR, 10) }
+ Device (SS03) { Name (_ADR, 11) }
+ Device (SS04) { Name (_ADR, 12) }
+ Device (SS05) { Name (_ADR, 13) }
+ Device (SS06) { Name (_ADR, 14) }
+ }
}
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index f782cc3238..4c8abda7f3 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -34,6 +34,7 @@
#include <intelblocks/xdci.h>
#include <fsp/api.h>
#include <fsp/util.h>
+#include <intelblocks/acpi.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/itss.h>
#include <intelblocks/pmclib.h>
@@ -50,11 +51,44 @@
#include "chip.h"
-static const char *soc_acpi_name(const struct device *dev)
+const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
return "PCI0";
+ if (dev->path.type == DEVICE_PATH_USB) {
+ switch (dev->path.usb.port_type) {
+ case 0:
+ /* Root Hub */
+ return "RHUB";
+ case 2:
+ /* USB2 ports */
+ switch (dev->path.usb.port_id) {
+ case 0: return "HS01";
+ case 1: return "HS02";
+ case 2: return "HS03";
+ case 3: return "HS04";
+ case 4: return "HS05";
+ case 5: return "HS06";
+ case 6: return "HS07";
+ case 7: return "HS08";
+ }
+ break;
+ case 3:
+ /* USB3 ports */
+ switch (dev->path.usb.port_id) {
+ case 0: return "SS01";
+ case 1: return "SS02";
+ case 2: return "SS03";
+ case 3: return "SS04";
+ case 4: return "SS05";
+ case 5: return "SS06";
+ }
+ break;
+ }
+ return NULL;
+ }
+
if (dev->path.type != DEVICE_PATH_PCI)
return NULL;