diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-03-14 18:26:27 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-28 18:29:43 +0200 |
| commit | 7952e283fb6dac19a10112199814c80619a28366 (patch) | |
| tree | 0b7ffb6932759a02bf5016e0999290c7eb11d2e4 /src/soc/intel/apollolake/northbridge.c | |
| parent | 93ebe499d45679a250de780d8a8b73d32d7ea00e (diff) | |
soc/intel/apollolake: Clean up code by using common System Agent module
This patch currently contains the SA initialization
required for bootblock phase -
1. Use SOC_INTEL_COMMON_BLOCK_SA kconfig for common SA code.
2. Perform PCIEXBAR programming based on soc configurable
PCIEX_LENGTH_xxxMB
3. Use common systemagent header file.
Change-Id: I01a24e2d4f1c8c9ca113c128bb6b3eac23dc79ad
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18567
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/northbridge.c')
| -rw-r--r-- | src/soc/intel/apollolake/northbridge.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/northbridge.c b/src/soc/intel/apollolake/northbridge.c index 6f92283c43..9519603300 100644 --- a/src/soc/intel/apollolake/northbridge.c +++ b/src/soc/intel/apollolake/northbridge.c @@ -20,7 +20,7 @@ #include <soc/iomap.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <soc/northbridge.h> +#include <soc/systemagent.h> #include <soc/pci_ids.h> static uint32_t get_bar(device_t dev, unsigned int index) @@ -39,7 +39,7 @@ static int mc_add_fixed_mmio_resources(device_t dev, int index) /* PCI extended config region */ addr = ALIGN_DOWN(get_bar(dev, PCIEXBAR), 256*MiB) / KiB; - mmio_resource(dev, index++, addr, PCIEX_SIZE / KiB); + mmio_resource(dev, index++, addr, CONFIG_SA_PCIEX_LENGTH / KiB); /* Memory Controller Hub */ addr = ALIGN_DOWN(get_bar(dev, MCHBAR), 32*KiB) / KiB; |