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| author | Felix Held <felix-coreboot@felixheld.de> | 2022-02-03 15:31:55 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-04 15:23:00 +0000 |
| commit | 6151ff3eae6503e1b14fd0898b689f295ddd48f8 (patch) | |
| tree | c298f48414fe2e19eacb1db3dad6cf0333c9fb29 /src/soc/intel/apollolake/meminit_util_glk.c | |
| parent | 3bdbdb77a2ab8904487266b26a33b18c7d85e28b (diff) | |
drivers/i2c/designware/dw_i2c: improve CONTROL_SPEED_FS definition
The speed control bits of the Designware I2C controller are bits 1 and 2
in the control register, so the values should be written as number
shifted by the number of the first bit. The resulting constant is
identical.
TEST=Timeless build for amd/chausie results in identical binary
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id0881dfcd7703ab6a70a9b1a355d5a93771aebc6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/meminit_util_glk.c')
0 files changed, 0 insertions, 0 deletions