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authorAngel Pons <th3fanbus@gmail.com>2020-09-07 13:18:10 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-09 10:34:32 +0000
commitb36100faf49c5a01e062e93b9a2fe542709fb6bd (patch)
treead70742077d0185b38d72ce2ff264a3c7f81ecea /src/soc/intel/apollolake/include
parentee735945754180544c8bd060d6fc0b9b2c507360 (diff)
soc/intel/apollolake: Rename `SOC_INTEL_GLK` symbol
For consistency with other platforms, use `SOC_INTEL_GEMINILAKE`. Change-Id: I06310e5a9bca6c9504f19a6c2fe9b26626f290d4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45141 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/apollolake/include')
-rw-r--r--src/soc/intel/apollolake/include/soc/gpio.h2
-rw-r--r--src/soc/intel/apollolake/include/soc/pcr_ids.h2
-rw-r--r--src/soc/intel/apollolake/include/soc/pm.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h
index b672f242bd..9b809c000a 100644
--- a/src/soc/intel/apollolake/include/soc/gpio.h
+++ b/src/soc/intel/apollolake/include/soc/gpio.h
@@ -3,7 +3,7 @@
#ifndef _SOC_APL_GPIO_H_
#define _SOC_APL_GPIO_H_
-#if CONFIG(SOC_INTEL_GLK)
+#if CONFIG(SOC_INTEL_GEMINILAKE)
#include <soc/gpio_glk.h>
#else
#include <soc/gpio_apl.h>
diff --git a/src/soc/intel/apollolake/include/soc/pcr_ids.h b/src/soc/intel/apollolake/include/soc/pcr_ids.h
index 96466f0f6d..4e043bbb95 100644
--- a/src/soc/intel/apollolake/include/soc/pcr_ids.h
+++ b/src/soc/intel/apollolake/include/soc/pcr_ids.h
@@ -6,7 +6,7 @@
/*
* Port ids.
*/
-#if CONFIG(SOC_INTEL_GLK)
+#if CONFIG(SOC_INTEL_GEMINILAKE)
#define PID_GPIO_AUDIO 0xC9
#define PID_GPIO_SCC 0xC8
#else
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index eb8c077874..aaf62583e6 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -177,7 +177,7 @@
#define GPE0_DWX_MASK 0xf
#define GPE0_DW_SHIFT(x) (4 + 4*(x))
-#if CONFIG(SOC_INTEL_GLK)
+#if CONFIG(SOC_INTEL_GEMINILAKE)
#define PMC_GPE_AUDIO_31_0 9
#define PMC_GPE_N_95_64 8
#define PMC_GPE_N_63_32 7