diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2016-03-04 21:33:04 -0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-03-10 22:57:00 +0100 |
| commit | 9d903a1dd352ce16c6e6feee5f63e3b21c821111 (patch) | |
| tree | ad205ae29d6874a3ca5619ce6e7493c598b5dcb6 /src/soc/intel/apollolake/include | |
| parent | 7760261db770aeee520aac2c313af764b606d4bf (diff) | |
soc/apollolake: Enable all CPU cores using the parallel MP lib
This is the minimal setup needed to get all CPU cores enabled. That
includes sending an IPI to APs and setting up MTRRs. Microcode updates
are not performed for two reasons:
* CSE (Converged Security Engine) upgrades the microcode before
releasing reset
* Microcode update files are not available at this point in time
Change-Id: Ia1115983696b0906fb4cefcbe1bbe4fc100751ca
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/13910
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/cpu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h index 870f474c87..765be7037e 100644 --- a/src/soc/intel/apollolake/include/soc/cpu.h +++ b/src/soc/intel/apollolake/include/soc/cpu.h @@ -14,12 +14,18 @@ #define _SOC_APOLLOLAKE_CPU_H_ #include <cpu/x86/msr.h> +#include <device/device.h> #define CPUID_APOLLOLAKE_A0 0x506c8 +#define CPUID_APOLLOLAKE_B0 0x506c9 #define MSR_PLATFORM_INFO 0xce #define MSR_POWER_MISC 0x120 +#define MSR_CORE_THREAD_COUNT 0x35 #define BASE_CLOCK_MHZ 100 +void apollolake_init_cpus(struct device *dev); + + #endif /* _SOC_APOLLOLAKE_CPU_H_ */ |