diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-01-07 13:01:18 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-01-11 07:17:43 +0000 |
| commit | 05865b8fbdef5df6cda4183eb66df5ef817cfe67 (patch) | |
| tree | 3ed9d8786f2ceaa115b56e898035d4e64fbdeb70 /src/soc/intel/apollolake/include | |
| parent | 17c9cfe2125736e49d335efcc624b53d213444ef (diff) | |
soc/intel/apl: Rework on CPU privilege level implementation
This patch migrates common code API into SoC specific implementation
to drop CPU privilege level as the MSR is not consistent across
platforms.
For example: On APL/GLK, it's MSR 0x120 and CNL onwards it's MSR 0x151.
Also, include `soc/msr.h` in cpu.h to fix the compilation issue.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I0b6f39509cc5457089cc15f28956833c36b567ad
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60898
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/cpu.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/msr.h | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h index 38b830a16f..3157952455 100644 --- a/src/soc/intel/apollolake/include/soc/cpu.h +++ b/src/soc/intel/apollolake/include/soc/cpu.h @@ -5,6 +5,7 @@ #include <cpu/x86/msr.h> #include <intelblocks/msr.h> +#include <soc/msr.h> struct device; void apollolake_init_cpus(struct device *dev); diff --git a/src/soc/intel/apollolake/include/soc/msr.h b/src/soc/intel/apollolake/include/soc/msr.h index e35c8814eb..97c67ddc21 100644 --- a/src/soc/intel/apollolake/include/soc/msr.h +++ b/src/soc/intel/apollolake/include/soc/msr.h @@ -5,4 +5,8 @@ #include <intelblocks/msr.h> +#define MSR_POWER_MISC 0x120 +#define ENABLE_IA_UNTRUSTED (1 << 6) +#define FLUSH_DL1_L2 (1 << 8) + #endif |