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author | Arthur Heymans <arthur@aheymans.xyz> | 2021-11-17 17:25:48 +0100 |
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committer | David Hendricks <david.hendricks@gmail.com> | 2023-02-06 00:22:46 +0000 |
commit | 20d25779c8eab9e21668a18a6180d75775f4eaee (patch) | |
tree | 521cf8f4f8c9a4be624c22ffac10cc0e85ebd445 /src/soc/intel/apollolake/i2c.c | |
parent | 306bd40939dfee091186d28e1668607bc144decb (diff) |
device/pci_device.c: Add way to limit max bus numbers
By default this limits PCI buses to CONFIG_MMCONF_BUS_NUMBER.
Some platforms have multiple PCI root busses (e.g. xeon_sp), where bus
numbers are limited. This provides a basic check. On some platforms it
looks like programming 0xff to the subordinate bus number confuses and
hangs the hardware.
Change-Id: I0582b156df1a5f76119a3687886c4d58f2d3ad6f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/soc/intel/apollolake/i2c.c')
0 files changed, 0 insertions, 0 deletions