diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-02-01 08:06:04 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2023-02-06 08:09:35 +0000 |
| commit | 584d5e1cbabc1a8ce679597263d22a2a9b87c9f7 (patch) | |
| tree | a1d2536b8c7ca9a2ba784249876a1ff91c2d0f49 /src/soc/intel/apollolake/chipset_glk.cb | |
| parent | 20d25779c8eab9e21668a18a6180d75775f4eaee (diff) | |
soc/intel/apl: Hook up cpu ops in devicetree
This simplifies the code flow of the cpu init. APL can do CPU init after
calling FSP-S, while GLK needs to do that before. This is now reflected
directly in the cpu ops rather than using
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT as a proxy.
Change-Id: I7fd1db72ca98f0a1b8fd03a979308a7c701a8a54
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/apollolake/chipset_glk.cb')
| -rw-r--r-- | src/soc/intel/apollolake/chipset_glk.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/chipset_glk.cb b/src/soc/intel/apollolake/chipset_glk.cb index 07eecf5b17..c6f2db1fe1 100644 --- a/src/soc/intel/apollolake/chipset_glk.cb +++ b/src/soc/intel/apollolake/chipset_glk.cb @@ -1,5 +1,5 @@ chip soc/intel/apollolake - device cpu_cluster 0 on end + device cpu_cluster 0 on ops glk_cpu_bus_ops end device domain 0 on device pci 00.0 alias system_agent on end # Host Bridge device pci 00.1 alias dptf on end # DPTF |