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authorSean Rhodes <sean@starlabs.systems>2022-05-19 15:35:31 +0100
committerNico Huber <nico.h@gmx.de>2022-06-20 20:09:40 +0000
commit57779955c9be64426e591557fe8571637028ddad (patch)
tree24503f839e3593236d4d8900abd9a5556b1bbd2a /src/soc/intel/apollolake/chip.c
parent3f205a416e89b3a105a5346fa2381b1675e859e5 (diff)
soc/intel/apollolake: Hook Up SataPortEnable to devicetree
Hook Up SataPortsEnable to the devicetree. As the default value is 0, set both [0] and [1] in all mainboards so they aren't affected. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ica8cf9484a6e6fe4362eabb8a9a59fcaf97c1bd3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64524 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/chip.c')
-rw-r--r--src/soc/intel/apollolake/chip.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index e824328350..ac8dfdf568 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -728,8 +728,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
silconfig->PavpEnable = CONFIG(PAVP);
/* SATA config */
- if (is_devfn_enabled(PCH_DEVFN_SATA))
+ if (is_devfn_enabled(PCH_DEVFN_SATA)) {
silconfig->SataSalpSupport = !(cfg->DisableSataSalpSupport);
+ memcpy(silconfig->SataPortsEnable, cfg->SataPortsEnable,
+ sizeof(silconfig->SataPortsEnable));
+ }
/* 8254 Timer */
bool use_8254 = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER));