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authorMario Scheithauer <mario.scheithauer@siemens.com>2023-06-15 14:46:42 +0200
committerJakub Czapiga <jacz@semihalf.com>2023-06-19 11:10:32 +0000
commit3f1e034835fc40b43b95746b37b291de8c860810 (patch)
tree32d726e0bfd3b40c6c8406f11d043aa034910f1a /src/soc/intel/apollolake/chip.c
parentc7beb4f3176dc0e3cf26be46a7385b6352ba3b2b (diff)
soc/intel/apollolake: Switch to snake case for SataPwrOptimizeDisable
For a unification of the naming convension, change from pascal case to snake case style for parameter 'SataPwrOptimizeDisable'. Change-Id: I35b36f60d2f00bfad307dff7bd131c20ebccf60b Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75859 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/chip.c')
-rw-r--r--src/soc/intel/apollolake/chip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 44daa5edf9..0e54fd8291 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -745,7 +745,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
}
/* Sata Power Optimisation */
- silconfig->SataPwrOptEnable = !(cfg->SataPwrOptimizeDisable);
+ silconfig->SataPwrOptEnable = !(cfg->sata_pwr_optimize_disable);
/* 8254 Timer */
bool use_8254 = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER));