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authorFelix Singer <felixsinger@posteo.net>2020-07-26 09:26:52 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-07-28 08:38:06 +0000
commit6c3a89c431e938c276e5ed01e21b60cf04b44504 (patch)
treef40ffa39cf494b54138478728f39350a958ae487 /src/soc/intel/apollolake/chip.c
parentca4164e629a8162dc6b297c13a725a9f2b3ee4eb (diff)
soc/intel/apollolake: Simplify is-device-enabled checks
Simplify if-statements and use is_dev_enabled() where possible. Change-Id: Ieeec987dc2bfe5bdef31882edbbb36e52f63b0e6 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43899 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/chip.c')
-rw-r--r--src/soc/intel/apollolake/chip.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index b1b3ee8bda..d6e6187b76 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -554,7 +554,7 @@ static void glk_fsp_silicon_init_params_cb(
}
dev = pcidev_path_on_root(SA_GLK_DEVFN_GMM);
- silconfig->Gmm = dev ? dev->enabled : 0;
+ silconfig->Gmm = is_dev_enabled(dev);
/* On Geminilake, we need to override the default FSP PCIe de-emphasis
* settings using the device tree settings. This is because PCIe
@@ -696,10 +696,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
silconfig->VtdEnable = cfg->enable_vtd;
dev = pcidev_path_on_root(SA_DEVFN_IGD);
- if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled)
- silconfig->PeiGraphicsPeimInit = 1;
- else
- silconfig->PeiGraphicsPeimInit = 0;
+ silconfig->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev);
mainboard_silicon_init_params(silconfig);
}