From 6c3a89c431e938c276e5ed01e21b60cf04b44504 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sun, 26 Jul 2020 09:26:52 +0200 Subject: soc/intel/apollolake: Simplify is-device-enabled checks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Simplify if-statements and use is_dev_enabled() where possible. Change-Id: Ieeec987dc2bfe5bdef31882edbbb36e52f63b0e6 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/43899 Reviewed-by: Tim Wawrzynczak Reviewed-by: Angel Pons Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/chip.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'src/soc/intel/apollolake/chip.c') diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index b1b3ee8bda..d6e6187b76 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -554,7 +554,7 @@ static void glk_fsp_silicon_init_params_cb( } dev = pcidev_path_on_root(SA_GLK_DEVFN_GMM); - silconfig->Gmm = dev ? dev->enabled : 0; + silconfig->Gmm = is_dev_enabled(dev); /* On Geminilake, we need to override the default FSP PCIe de-emphasis * settings using the device tree settings. This is because PCIe @@ -696,10 +696,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) silconfig->VtdEnable = cfg->enable_vtd; dev = pcidev_path_on_root(SA_DEVFN_IGD); - if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) - silconfig->PeiGraphicsPeimInit = 1; - else - silconfig->PeiGraphicsPeimInit = 0; + silconfig->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev); mainboard_silicon_init_params(silconfig); } -- cgit v1.2.3