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authorHsuan-ting Chen <roccochen@google.com>2021-10-07 06:21:28 +0000
committerFelix Held <felix-coreboot@felixheld.de>2021-10-15 13:00:32 +0000
commitadb393bdd6cd6734fa2672bd174aca4588a68016 (patch)
tree584f20ba1cadcb3b36c856d501d4a7b3d4eeb047 /src/soc/intel/apollolake/Makefile.inc
parent82130369a1c8b06b0aa5e804096d93b98ffce7cc (diff)
Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"
This reverts commit 6260bf712a836762b18d80082505e981e040f4bc. Reason for revert: This CL did not handle Intel GPIO correctly. We need to add GPIO_EC_IN_RW into early_gpio_table for platforms using Intel SoC. Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Change-Id: Iaeb1bf598047160f01e33ad0d9d004cad59e3f75 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57951 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
-rw-r--r--src/soc/intel/apollolake/Makefile.inc2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 3b17607a18..49707da1a6 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -92,13 +92,11 @@ bootblock-y += gpio_glk.c
romstage-y += gpio_glk.c
smm-y += gpio_glk.c
ramstage-y += gpio_glk.c
-verstage-y += gpio_glk.c
else
bootblock-y += gpio_apl.c
romstage-y += gpio_apl.c
smm-y += gpio_apl.c
ramstage-y += gpio_apl.c
-verstage-y += gpio_apl.c
endif
CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include