soc/intel: Add Raptor Lake device IDs

Add Raptor Lake specific CPU, System Agent, PCH, IGD device IDs.

References:
RaptorLake External Design Specification Volume 1 (640555)
600/700 Series PCH External Design Specification Volume 1 (626817)

Change-Id: I39e655dec2314a672ea63ba90d8bb3fc53bf77ba
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63750
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com>

3 files changed, 50 insertions, 3 deletions

diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index bdce2b7b84..f2bed738bf 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -29,6 +29,7 @@ static struct {
 	{ CPUID_ALDERLAKE_Q0, "Alderlake Q0 Platform" },
 	{ CPUID_ALDERLAKE_R0, "Alderlake R0 Platform" },
 	{ CPUID_ALDERLAKE_N_A0, "Alderlake-N Platform" },
+	{ CPUID_RAPTORLAKE_P_J0, "Raptorlake-P J0 Platform" },
 };
 
 static struct {
@@ -50,6 +51,8 @@ static struct {
 	{ PCI_DID_INTEL_ADL_N_ID_2, "Alderlake-N" },
 	{ PCI_DID_INTEL_ADL_N_ID_3, "Alderlake-N" },
 	{ PCI_DID_INTEL_ADL_N_ID_4, "Alderlake-N" },
+	{ PCI_DID_INTEL_RPL_P_ID_1, "Raptorlake-P" },
+	{ PCI_DID_INTEL_RPL_P_ID_2, "Raptorlake-P" },
 
 };
 
@@ -89,11 +92,40 @@ static struct {
 	{ PCI_DID_INTEL_ADP_P_ESPI_29, "Alderlake-P SKU" },
 	{ PCI_DID_INTEL_ADP_P_ESPI_30, "Alderlake-P SKU" },
 	{ PCI_DID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" },
-	{ PCI_DID_INTEL_ADP_P_ESPI_32, "Alderlake-P SKU" },
-	{ PCI_DID_INTEL_ADP_P_ESPI_33, "Alderlake-P SKU" },
-	{ PCI_DID_INTEL_ADP_M_ESPI_32, "Alderlake-M SKU" },
 	{ PCI_DID_INTEL_ADP_M_N_ESPI_1, "Alderlake-N SKU" },
 	{ PCI_DID_INTEL_ADP_M_N_ESPI_2, "Alderlake-N SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_0, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ADP_P_ESPI_1, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ADP_P_ESPI_2, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_3, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_4, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_5, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ADP_M_ESPI_6, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_7, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_8, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_9, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_10, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_11, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_12, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_13, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_14, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_15, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_16, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_17, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_18, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_19, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_20, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_21, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_22, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_23, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_24, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_25, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_26, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_27, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_28, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_29, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_30, "Raptorlake-P SKU" },
+	{ PCI_DID_INTEL_RPP_P_ESPI_31, "Raptorlake-P SKU" },
 };
 
 static struct {
@@ -127,6 +159,9 @@ static struct {
 	{ PCI_DID_INTEL_ADL_N_GT1, "Alderlake N GT1" },
 	{ PCI_DID_INTEL_ADL_N_GT2, "Alderlake N GT2" },
 	{ PCI_DID_INTEL_ADL_N_GT3, "Alderlake N GT3" },
+	{ PCI_DID_INTEL_RPL_P_GT1, "Raptorlake P GT1" },
+	{ PCI_DID_INTEL_RPL_P_GT2, "Raptorlake P GT2" },
+	{ PCI_DID_INTEL_RPL_P_GT3, "Raptorlake P GT3" },
 };
 
 static inline uint8_t get_dev_revision(pci_devfn_t dev)
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c
index 7d4fb9cdf2..fc4ca61f2d 100644
--- a/src/soc/intel/alderlake/cpu.c
+++ b/src/soc/intel/alderlake/cpu.c
@@ -231,6 +231,11 @@ enum adl_cpu_type get_adl_cpu_type(void)
 		PCI_DID_INTEL_ADL_N_ID_4,
 	};
 
+	const uint16_t rpl_p_mch_ids[] = {
+		PCI_DID_INTEL_RPL_P_ID_1,
+		PCI_DID_INTEL_RPL_P_ID_2,
+	};
+
 	const uint16_t mchid = pci_s_read_config16(PCI_DEV(0, PCI_SLOT(SA_DEVFN_ROOT),
 							   PCI_FUNC(SA_DEVFN_ROOT)),
 						   PCI_DEVICE_ID);
@@ -255,6 +260,11 @@ enum adl_cpu_type get_adl_cpu_type(void)
 			return ADL_N;
 	}
 
+	for (size_t i = 0; i < ARRAY_SIZE(rpl_p_mch_ids); i++) {
+		if (rpl_p_mch_ids[i] == mchid)
+			return RPL_P;
+	}
+
 	return ADL_UNKNOWN;
 }
 
@@ -265,6 +275,7 @@ uint8_t get_supported_lpm_mask(void)
 	case ADL_M: /* fallthrough */
 	case ADL_N:
 	case ADL_P:
+	case RPL_P:
 		return LPM_S0i2_0 | LPM_S0i3_0;
 	case ADL_S:
 		return LPM_S0i2_0 | LPM_S0i2_1;
diff --git a/src/soc/intel/alderlake/include/soc/cpu.h b/src/soc/intel/alderlake/include/soc/cpu.h
index cd6f34f663..424e02a6aa 100644
--- a/src/soc/intel/alderlake/include/soc/cpu.h
+++ b/src/soc/intel/alderlake/include/soc/cpu.h
@@ -25,6 +25,7 @@ enum adl_cpu_type {
 	ADL_N,
 	ADL_P,
 	ADL_S,
+	RPL_P,
 };
 
 enum adl_cpu_type get_adl_cpu_type(void);