diff options
| author | John <john.zhao@intel.com> | 2022-03-09 17:51:56 -0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-06 16:19:18 +0000 |
| commit | 848b42558c29aca8e08564303f9a3ab8007722ac (patch) | |
| tree | 51757aabc8ebddd194ec1f18807907f315751fe4 /src/soc/intel/alderlake | |
| parent | 740eee5eec2a978192e8b74327cb96b735b7d0ed (diff) | |
soc/intel/common: Abstract the common TCSS functions
This change abstracts the common TCSS functions for pad configuration
and Thunderbolt authentication.
BUG=b:213574324
TEST=Build platforms coreboot images successfully.
Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62723
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/tcss.c | 8 |
3 files changed, 9 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 25d11d3110..3570f27578 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -92,7 +92,6 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP select SOC_INTEL_COMMON_BLOCK_TCSS - select SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_REGBAR select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC select SOC_INTEL_COMMON_BLOCK_USB4 select SOC_INTEL_COMMON_BLOCK_USB4_PCIE diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 095d2100f2..16784aab48 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -43,6 +43,7 @@ ramstage-y += reset.c ramstage-y += retimer.c ramstage-y += soundwire.c ramstage-y += systemagent.c +ramstage-y += tcss.c ramstage-y += vr_config.c ramstage-y += xhci.c ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c diff --git a/src/soc/intel/alderlake/tcss.c b/src/soc/intel/alderlake/tcss.c new file mode 100644 index 0000000000..c51fe6c41f --- /dev/null +++ b/src/soc/intel/alderlake/tcss.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <intelblocks/tcss.h> + +const struct soc_tcss_ops tcss_ops = { + .configure_aux_bias_pads = tcss_configure_aux_bias_pads_regbar, + .valid_tbt_auth = tcss_valid_tbt_auth, +}; |