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authorSridhar Siricilla <sridhar.siricilla@intel.com>2023-01-03 11:29:08 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-01-06 21:34:54 +0000
commit4c3014feb276cd14ce4fbea4f75d7b0952841cf3 (patch)
treed6f77985592550c461149f5d2ead87a002a8f830 /src/soc/intel/alderlake
parent63fcc4acc20116241b007fc5bb6d4e48925b277d (diff)
soc/intel/: Rename small and big cores references
The patch addresses Intel heterogeneous cores as `Efficient` and `Performance` cores instead of `small` and `big` cores. It is to ensure coreboot code has uniform reference to the heterogeneous cores. So, the patch renames all `small` and `big` core references to `efficient` (eff) and `performance` (perf) cores respectively. TEST=Build the code for Brya and Rex boards Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I98c9c0ed86b211d736a0a1738b47410faa13a39f Reviewed-on: https://review.coreboot.org/c/coreboot/+/71639 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/alderlake')
-rw-r--r--src/soc/intel/alderlake/cpu.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c
index 4bc0af762f..768f2d533d 100644
--- a/src/soc/intel/alderlake/cpu.c
+++ b/src/soc/intel/alderlake/cpu.c
@@ -99,10 +99,10 @@ enum core_type get_soc_cpu_type(void)
return CPUID_CORE_TYPE_INTEL_CORE;
}
-void soc_get_scaling_factor(u16 *big_core_scal_factor, u16 *small_core_scal_factor)
+void soc_get_scaling_factor(u16 *perf_core_scal_factor, u16 *eff_core_scal_factor)
{
- *big_core_scal_factor = 127;
- *small_core_scal_factor = 100;
+ *perf_core_scal_factor = 127;
+ *eff_core_scal_factor = 100;
}
bool soc_is_nominal_freq_supported(void)